Seeking an outstanding candidate to join a growing semiconductor company developing a Short-Wave Infrared sensor for the automotive market. Be a part of a highly skilled team that is building the future.
The Senior Verification Engineer works as part of a team which is responsible for SoC and Image Signal Processing design. We are looking for someone who welcomes new challenges and enjoys working in a dynamic startup environment that includes multi-disciplines such as Electro-Optics, Analog Design, Signal Processing & Algorithms, and Real-Time SW.
Your Day to Day:
- Definition, architecture, and development of verification environments and verification flows, with UVM like methodology using either Python or System Verilog
- Definition and development of block-level and IP-level verification environments, integrated and reused in full-chip environments
- Work closely with experienced design, software and algorithm teams
- Experience in verification of SoC level / Full chip level
- Experience with algorithmic/mathematical designs (ISP, filters) – advantage
- Experience with FPGA verification – advantage
- Experience with VIPs, SOC, image sensors and ISP - advantage
Why should you be a TriEyoneer?:
- Timing is everything! You want to be a part of a fast-growing deep-tech company backed by industry leaders, as it enters a significant stage of global growth.
- Inspiring skill development by providing growth opportunities
- Interest in supporting TriEye’s mission to improve and save lives by making Short-Wave Infrared (SWIR) technology accessible to everyone. Harnessing the power of SWIR sensing to provide superior vision, enables access to mission-critical image data even in the most challenging visibility conditions. This is a unique opportunity to take an active part in building a world’s first technology.
TriEye is an equal opportunity employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.
- BSc/MSc in Electrical Engineering/Computer Engineering/Computer Science
- At least 5 years experience in functional verification
- At least 3 years experience with Python or SystemVerilog/Specman UVM
- Good knowledge of coverage-driven verification flow
- Proven track record in verification work. This includes planning, execution, tracking, verification closure
- Team Player, motivated, able to coach and mentor other team members
- Strong analytical and problem-solving skills
- Out-of-the-box thinker, go-getter that welcomes new environments and challenges
- Experience in Linux environment and scripting languages such as Python/tcsh/perl